added compile command for System Verilog

main
Isabell Pflug 2 years ago
parent 0141900553
commit fba4119af3

@ -7,6 +7,7 @@ My preferred compile commands to quickly look up
* if necessary, remove `-Wpedantic`, since it warns for features definitely included by using `gnu99` as compiler
* **C++** - `g++ -Wall -c blob.cpp blub.cpp` -> `g++ -Wall -o blub blob.o blub.o`
* `blob.cpp` gets linked (blub.cpp would likely start with something like `#include "blob.h"`)
* **System Verilog** - `iverilog -Wall -g2012 1.sv 2.sv 3_tb.sv 3.sv -o 3_tb` <- tb for testbench simulation
## Other languages
* **LaTeX** - `lualatex blub.tex`

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